Intel’s x86 chips at the moment are forging into new territory — leaked slides printed by outstanding {hardware} leaker @YuuKi_AnS (but shortly eliminated) point out that the compute tile of the Lunar Lake MX processors shall be made utilizing TSMC’s N3B fabrication know-how, marking the primary time Intel has used outsourced course of node tech for its highest-end x86 cores. Intel’s Lunar Lake processors are set to function an all-new microarchitecture designed from the bottom as much as provide breakthrough performance-per-watt effectivity, primarily for cell gadgets, however it’s unclear how previous the slides are — these may replicate an older plan for the sequence.
Based on the slides, Intel’s Lunar Lake MX platform lineup will provide processors with as much as eight general-purpose cores (4 high-performance Lion Cove and 4 Skymont energy-efficient cores), 12MB cache, as much as eight Xe2 GPU clusters, and as much as a six-tile NPU 4.0 AI accelerator. Relying on the ability goal, the platform will help 8W fanless in addition to 17W – 30W fanned designs.
The compute tile will purportedly be produced on TSMC’s 3nm-class N3B course of know-how. In the meantime, Intel itself indicated that its Lunar Lake CPUs will use its personal 18A (1.8nm-class) fabrication course of.
Intel’s Lunar Lake MX platform will retain Intel’s multi-chiplet Foveros3D-interconnected design method. Nonetheless, to cut back its bodily footprint, Intel plans to pack the CPU, GPU, and reminiscence controller into the identical tile whereas placing all the pieces else into the SoC tile, in accordance with the slides.
As well as, Intel’s Lunar Lake MX is aimed primarily at laptops, and it’s set to return with 16GB or 32GB of LPDDR5X-8533 memory-on-package, which is able to additional cut back the platform’s footprint and enhance efficiency.
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Primarily based on Intel’s estimates offered within the slides, its Lunar Lake MX design will save 100 to 250mm^2 of house in comparison with typical designs with reminiscence exterior the CPU bundle.
Whereas it’s odd to see Intel utilizing TSMC’s N3B course of know-how to construct its Lunar Lake MX processors, it isn’t utterly sudden. Because the firm needs to place CPU and GPU cores into the identical piece of silicon, it’d simply make extra sense to construct all the pieces on TSMC’s N3B as a result of GPUs are usually larger than CPUs and re-architecting Xe2 GPU for Intel’s 18A node may take extra time than the corporate want to spend on its low-power cell processor.
Nonetheless, that is the primary time Intel will use a third-party course of know-how for certainly one of its flagship CPUs, highlighting the flexibleness of its IDM 2.0 method to design and manufacturing.