AMD Responds to Claims of EPYC Genoa Reminiscence Bug, Says Replace On Monitor

Posted on

(Picture credit score: Tom’s {Hardware})

At a current monetary convention, AMD CTO Mark Papermaster was requested a few report of a reminiscence bug with the corporate’s EPYC Genoa processors that may ostensibly require a prolonged redesign/respin course of to repair. His reply was a bit obscure, so we adopted up with AMD for extra particulars. The corporate repudiated the claims of a reminiscence bug, telling Tom’s {Hardware} that each one fourth-gen EPYC processors shipped up to now absolutely assist the approaching 2DPC reminiscence configuration and that no respin is required. Moreover, the corporate has already issued BIOS updates to its OEM companions to allow the promised assist for 2DPC configurations by the tip of Q1 2023. AMD additionally shared different particulars we’ll cowl beneath. However first, a little bit of background information.

As you’ll be able to see in our EPYC Genoa evaluation, AMD’s new information middle chips exhibit market-leading efficiency and include a number of new interfaces, with assist for 12 channels of DDR5 reminiscence being one of the vital. Nonetheless, Genoa solely launched with assist for DDR5 reminiscence in a one DIMM per channel (1DPC) configuration. This sort of configuration helps just one reminiscence stick related to every of the twelve DDR5 reminiscence controllers contained in the processor.

At launch, AMD mentioned it might launch a BIOS replace within the first quarter of 2023 to allow assist for 2 reminiscence DIMMS per channel (2DPC), thus permitting two reminiscence sticks to be related to every reminiscence channel to spice up capability. AMD mentioned it was additional characterizing and tuning the 2DPC reminiscence configurations, so it might launch the spec for the supported 2DPC reminiscence speeds when the replace grew to become accessible.

Within the interim, SemiAccurate (partially paywalled) reported a purported downside with AMD’s Genoa processors final month. The report cited unnamed business sources that declare Genoa has a bug within the reminiscence subsystem, so AMD needed to embark on a pricey respin of the processors to assist 2DPC reminiscence configurations. This is able to inevitably result in delays of a number of months as the brand new chips labored their approach via the redesign and manufacturing course of.

Naturally, a bug within the reminiscence subsystem for the delivery chips would imply that the currently-shipping Genoa processors wouldn’t assist the forthcoming 2DPC spec. So to find out if a brand new respin was wanted, we requested AMD if the entire Genoa processors already in circulation would assist the 2DPC reminiscence configuration when launched, which the corporate assured us is the case.

Moreover, AMD went on the file to say that no respin is required for 2DPC assist. As an alternative, the corporate says 2DPC assist solely requires the BIOS replace it has already issued to its OEM prospects. Consequently, they’re already designing motherboards with sufficient slots to assist the characteristic.

AMD additionally clarified Papermaster’s feedback on the current Morgan Stanley investor convention, which have been misinterpreted. On the convention, Papermaster mentioned, “And the two DIMM per channel, which is I believe what you are referring to is following. So that’s for a focused – a a lot smaller focused set of consumers. These speeds might be introduced later this quarter, and that may ramp as properly, however this variety of prospects for two DIMMs per channel is way smaller.” AMD says the “ramp” remark is in reference to techniques that assist 2DPC configurations (they want extra bodily slots), to not a more recent revision of the processor.


(Picture credit score: Tom’s {Hardware})

Genoa’s assist for 12 channels of DDR5 is the very best in the marketplace for an x86 processor. Genoa has 50% extra channels than Sapphire Rapids‘ eight channels, and each chips assist a peak of DDR5-4800 reminiscence in a 1DPC configuration. Intel has specced its 2DPC configuration at DDR5-4400, however as talked about, AMD hasn’t completed qualifying its 2DPC switch charges.

AMD’s choice to launch Genoa earlier than it had finalized 2DPC assist is sound — it’s rational to count on that the demand for 2DPC configs might be dramatically lower than we have seen up to now. The 2DPC config is usually used to entry elevated capability (there will be small efficiency enhancements with sure rank configs). However with 12 reminiscence channels in a 1DPC configuration, AMD can already assist as much as 3TB of reminiscence per chip with 256 GB sticks. That is a lot for the broadest cross-section of customers. Assist for 2DPC boosts that capability to 6TB of DDR5 per socket, however AMD is already working into area constraints packing in 12 channels of reminiscence into common two-socket servers.

As you’ll be able to see within the above picture of our Genoa take a look at server, cramming in 24 complete DIMM slots for a 1DPC config already creates loads of points because of area constraints. Frankly, it is exhausting to think about packing in twice the variety of pictured slots for a 2DPC configuration — a dual-socket server would wish 48 complete slots. As such, we imagine that the majority 2DPC configs will probably both be for single-socket servers or use a diminished variety of channels in dual-socket servers.

There are already loads of challenges enabling the pictured 1DPC config. Actually, AMD had to make use of particular ‘skinny’ reminiscence slots for Genoa motherboards to assist pack 12 slots into the chassis. AMD cautioned us that, as a result of skinny slots and different lodging for the denser association, it has had a number of incidents the place lateral stress when putting in the DDR5 DIMMs had stripped the DIMM socket off the board. That is an edge case and never indicative of a problem with the platform, nevertheless it does level to the challenges AMD already faces with ‘simply’ 12 reminiscence slots.

The challenges for 2DPC broaden past simply the area wanted for extra slots. As we have seen with DDR4 reminiscence, including extra DIMMs per channel ends in diminished reminiscence speeds, and extra channels ends in much more complexity. Moreover, even having further empty slots may end up in decrease peak reminiscence speeds, as seen with the difficult DDR4 and DDR5 assist matrix for the buyer platforms. These issues turn out to be much more vexing with DDR5, because it has a lot greater tolerances and requires extra complicated motherboard designs with extra layers and higher supplies, which provides price. It will turn out to be much more difficult with the upper switch charges wanted for next-gen reminiscence — market insiders have even predicted that assist for 2DPC may finish with the DDR6 commonplace.

As a result of regular step-down in speeds with 2DPC configs, Intel’s Sapphire Rapids drops from DDR5-4800 to DDR5-4400 when in a 2DPC config. We will additionally count on Genoa’s 2DPC speeds to be diminished when the corporate releases the ultimate spec, nevertheless it stays to be seen how a lot penalty it would incur.

AMD says it would launch the small print of Genoa’s 2DPC assist this month, and we’ll replace as soon as we obtain the small print.

Supply hyperlink

Leave a Reply

Your email address will not be published. Required fields are marked *